By Synergy of these two Technologies
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OPENEDGES’ ORBITTM DDR Memory Controller IP (OMCTM) options excellent DRAM bandwidth utilization and ORBITTM Community-on-Chip Interconnect (OICTM) is a highly optimized on chip interconnect fabric for the excessive end SoC. DDR Memory Controller IP (OMCTM) and Community-on-Chip Interconnect (OICTM) are tightly coupled. This combined memory subsystem IP brings lots of synergy by way of efficiency, bandwidth, latency & others. This sensible community camera SoC supports high decision 4K 60fps encoding, new generation ISP, intelligent vision processing & others. Total, system habits is very difficult and performance demanding. So bandwidth efficiency and quality-of-service (QoS) in the memory subsystem are the 2 most crucial components of the high finish SoC design. Initially this customer selected a DDR controller and a Community on-chip (NoC) interconnect from two different IP suppliers. Nonetheless, the combination didn't ship the required DRAM bandwidth and quality-of-service (QoS) and, as a result, overall system performance suffered a lot. Solely after each DDR controller (OMCTM) and Community-on-Chip Interconnect (OICTM) from OPENEDGES have been used, it has change into potential to satisfy the demand of their intelligent high finish SoC.
Some of the killer options supplied by the OMC and OIC combination for the customer are as below. DDR Utilization has been elevated by 30% than earlier than and this enabled them to realize target DRAM bandwidth. Average & peak latency of the latency-delicate grasp IPs have been decreased to almost half than earlier than with the extremely efficient quality-of-service administration feature (ActiveQoSTM). Timing closing at the SoC backend design time acquired dramatically simpler & faster than before with the LDATM know-how. Frequency of the spine has been nearly doubled with the HyperPathTM know-how, resulting in 1/2x area and, extra importantly, decrease energy consumption. Nowadays, Memory Wave SoC designers undergo loads from big selection of points associated to memory subsystem designs together with problem of excessive-speed timing closing, lack of DRAM bandwidth, problem of high quality-of-service (QoS) management, and finally time-to-market delay. New breakthrough in the memory subsystem IP resolution is required to meet these tough challenges.
OPENEDGES’ highly efficient memory subsystem IP resolution is a recreation changer for the new SoC designs. OPENEDGES is the only IP company offering each the DDR controller (OMCTM) and the Network-on-Chip (OICTM). OPENEDGES' ORBITTM memory subsystem IP has tightly coupled DDR controller and Network on-chip interconnect to deliver maximum effectivity based mostly on their synergy. It permits more refined and efficiency demanding SoC programs with higher bandwidth effectivity and higher power efficiency. OPENEDGES additionally gives AI accelerator IP (ENLIGHTTM), which can be tightly built-in with the memory subsystem IP, and will probably be formally launched very soon. OPENEDGES is a semiconductor IP provider for good computing empowering Web of Smart Things. Committed to democratizing artificial intelligence technology at the edge devices, OPENEDGES delivers IPs in two key know-how areas of sensible computing; extremely environment friendly Artificial Intelligence Acceleration and excessive-efficiency Memory Subsystem. By synergy of those two applied sciences, OPENEDGES offers sorely needed increase to performance, effectivity and reliability for Internet of Sensible Things. ORBITTM DDR Memory Wave Experience controller IP presently helps DDR3, DDR4, LPDDR3, LPDDR4 and LPDDR4x and assist of LPDDR5, DDR5, GDDR6 and HBM2 can be out there very quickly.
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